Feed such a circuit a binary number MSB first and after all the bits have been shifted in it will hold that number in BCD. The cheapest method in terms of circuitry is probably to have a clocked circuit which, loaded with some number N in BCD format, and fed an single-bit input C, will load itself with 2*N+C on the next clock cycle. Many, many things in FPGAs reduce to "write the code in whatever way solves the problem without too much fuss and let the compiler do the dirty work." Code generator programs are your friends.ĭoes the device have to do the conversion in a single step, or can it be an iterative process? v file and feed it to your FPGA compiler and let it do the dirty work. doesn't matter, as long as you're familiar with it) that generates the following output.Īlways for each number from 0 to 99, generate this group of lines: 7'd_: beginįill in the appropriate values where the _ are. You're supposed to do this with an FPGA? Write a program in some language (C, C++, Python, Perl.
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